USRP Software Defined Radio

USRP is a software defined radio that enables users to rapidly design, prototype, and deploy wireless systems. The USRP architecture consists of high-performance processors, large FPGAs, and a wide breadth of high-quality RF front ends. Combined with our robust software support, including UHD™ (USRP Hardware Driver™), which ensures cross-platform code portability, you can maximize code reuse while focusing on new algorithm development. Choose from a variety of deployment options, from the USRP Networked, B Series, and X Series, which enable rapid prototyping in the lab, to the USRP Embedded Series, which allows you to meet the SWaP requirements for rugged deployment.

USRP provides a design solution to rapidly prototype wireless communications systems, including applications such as multiple input, multiple output (MIMO) and LTE/WiFi testbeds. USRP is also used to design and deploy shared spectrum communications, SIGINT, and radar systems which capture, process, and transmit wide signal bandwidths at a broad range of frequencies.

Support packages are available for connecting MATLAB^® and Simulink^® to USRP radio hardware.

USRP Support Package from Communications Toolbox

The support package includes the use of USRP as a standalone peripheral for live RF data I/O, including:

• Functions and System objects for connecting MATLAB to UHD-based USRP radios
• Blocks for connecting Simulink to UHD-based USRP radios

USRP E310 Support from Communications Toolbox

Using this support package with a USRP E310, you can work with live RF signals using dual (2x2) transmit and receive streams. You can also implement custom hardware designs for your SDR applications using HDL Coder™ or Embedded Coder^®. This enables you to test your design under real-world conditions and rapidly prototype designs for mobile and embedded applications. 

Support highlights include the ability to:

• Stream 2x2 channel RF signals into and out of MATLAB and Simulink
• Enhance, transmit, and receive selectivity using automatic selection of RF front-end filter banks
• Acquire and transmit high-bandwidth signals using burst mode
• Implement custom algorithms on the FPGA fabric and ARM^® processor using HDL Coder or Embedded Coder (Note: Xilinx Vivado^® Design Suite is required. Refer to "Required Third-Party Tools" in the documentation.)

For details on the supported radio models, see the relevant support package Webpages.